Principal NPI Test Engineer

Our TeamSemtech's Global Test Engineering team is a world‑class organization of innovative engineers who enable the success of our entire semiconductor portfolio through cutting‑edge test solutions and methodologies. We are the technical backbone that ensures every Semtech product meets the highest standards of quality, reliability, and performance. Our team spans multiple sites globally and serves as the center of excellence for test innovation, working closely with all business units to deliver breakthrough test capabilities. We specialize in mixed‑signal, high‑speed digital, and RF test development, with particular expertise in advanced SiGe BiCMOS technologies. Our engineers drive competitive advantage through innovative test architectures, methodologies, and continuous improvement initiatives that directly impact Semtech's bottom line.Job SummaryWe are seeking a Principal NPI Test Engineer to serve as the technical authority and strategic leader for new product introduction test development in our mixed‑signal product portfolio. This role demands a proven innovator who can architect comprehensive test solutions spanning from early silicon validation through high‑volume production. The ideal candidate will drive testability standards across the organization, lead complex multi‑disciplinary projects, and deliver breakthrough test methodologies that enable next‑generation high‑speed communication products operating at 200Gbps and beyond.Primary responsibilitiesTechnical Leadership & Architecture (30%)Architect and define test strategies for complex mixed‑signal SiGe products from concept through production maturityLead development of innovative test methodologies for high‑speed SerDes, CDRs, and signal conditioning productsDrive DFT/testability requirements into IC architecture, establishing company‑wide standards and best practicesDevelop and implement advanced test techniques for products operating at >200Gbps data ratesCreate reusable test IP, libraries, and frameworks that accelerate NPI cycles across product familiesPerform technical risk assessment and mitigation strategies for test coverage and qualityCross-functional NPI Support (30%)Serve as test engineering authority in product architecture reviews and gate meetingsPartner with IC design teams from concept phase to ensure optimal test coverage and manufacturabilityLead test readiness reviews with stakeholders, providing strategic recommendationsCollaborate with Product Engineering to define characterization strategies and correlation methodologiesInterface with customer quality teams on test specifications and coverage requirementsArchitect and launch test solutions that achieve test time targets for complex mixed‑signal devicesDrive continuous improvement initiatives that reduce NPI cycle time by 10‑20%Innovation & Technology Development (20%)Research and implement next‑generation ATE capabilities and measurement techniquesDevelop proprietary test methods that provide competitive advantage in cost and qualityLead evaluation and adoption of new test platforms, instrumentation, and methodologiesPioneer implementation of AI/ML techniques for yield enhancement and test optimizationEstablish Semtech as industry leader in mixed‑signal test innovationProduction Excellence & Scale (10%)Ensure seamless transfer of test solutions to high‑volume OSATs with >99% first‑pass successDrive test cost reduction initiatives delivering year‑over‑year improvementsEstablish and monitor KPIs for test effectiveness, efficiency, and qualityMentorship & Knowledge Management (10%)Mentor junior engineers, developing next generation of test leadersCreate and maintain comprehensive test methodology documentation and training materialsBuild strategic relationships with test partners to influence platform developmentFoster culture of innovation and continuous learning within test organizationRequired QualificationsTechnical ExpertiseExpert‑level proficiency with Advantest V93000 platform (SmarTest 7/8)Advanced programming skills in C/C++, Python, and TCLDeep understanding of high‑speed signal integrity, jitter analysis, and BER testingExpertise in analog/mixed‑signal DFT techniques (BIST, scan, boundary scan)Proficiency in RF/microwave test techniques beyond 40GHzStrong foundation in statistical process control and quality methodologiesExperience with PCB design tools (Cadence, Altium) and signal integrity simulationLeadership & Business AcumenDemonstrated ability to influence without direct authority across organizationsTrack record of delivering complex projects on aggressive schedulesStrong presentation skills to executive leadership and customersProven ability to build and maintain strategic vendor relationshipsDesired QualificationsMaster's degree or PhD in relevant engineering discipline15+ years in semiconductor test with focus on SerDes/high‑speed I/OExperience with SiGe BiCMOS process technology and its test challengesKnowledge of automotive quality standards (AEC‑Q100) and qualification flowsFamiliarity with 93000 PS1600/PS3600 digital channels and Wave Scale RFExperience with wafer‑level testing and probe card designExperience with test data analytics and machine learning applicationsUnique Differentiators for This RoleServes as company‑wide test architecture authority for mixed‑signal productsBuilds test capabilities that enable entry into new markets and applicationsEstablishes Semtech's reputation as test innovation leader in high‑speed communicationsThe intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job‑related tasks other than those specifically included in this description.All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities. #J-18808-Ljbffr