Firmware Engineer
19 hours ago
Pre-silicon, you will influence architecture and develop firmware interfaces to allow cross-functional development across hardware, firmware and software teams. You, along with team members that you will mentor, will verify these routines pre-silicon using an RTL co-simulation framework. You will then help integrate these routines into a complete system involving boot code and system-level interfaces to be verified on FPGA or Emulation platforms.
Responsibilities
- Contribute to and review hardware, software, and system architecture
- Develop firmware design documents based on technical requirements.
- Mentor one or more engineers or interns to assist in implementation and debug
- Work closely with hardware designers, software engineers, and project managers to achieve design goals and meet project timelines.
Requirements
- BS/MS/PhD in EE/CE/CS, or equivalent
- 3+ years experience in firmware development for embedded processors and near real-time systems.
- Proven ability to develop and maintain high-quality design documents
- Good verbal and written communication skills
- Ability to work independently and as part of a team
Preferred Skills & Experience
- Experience with RTL simulation and pre-silicon firmware development
- Experience writing low-level firmware code (i.e. interacting with SoC IPs)
- Experience with leading junior engineers or interns
- Familiar with Register description languages or IP-XACT
- Familiar with RISC-V processor architecture and AMBA bus structures
- Familiar with debugging tools such as JTAG and gdb.
- 20 vacation days
- Strong health and extended health benefits
- Unlimited sick days
- Stock options
- Building chips and software that will change the world
Thinking about applying?
A little bit more about Untether AI
Untether AI has developed a groundbreaking new architecture that brings neural net inference to new levels of performance and efficiency. We’ve done this while continuing to improve our technology creating ultra-efficient, high performance AI chips that eliminates the data movement bottleneck that costs energy and performance in traditional architectures. We’re a team made up of scientists, engineers and entrepreneurs and have the support of tier one investors.
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